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www.irf.com 1 high reliability, radiation tolerant, low power, dc-dc converter D5001R803R3P description total dose > 50k rad(si) see > 40mev . cm 2 /mg low weight < 55 grams 26v to 55v dc input range up to 10w output power independently regulated outputs: +1.8v and +3.3v and other outputs available -55c to +80c operating temperature range 100m ? @ 100vdc isolation input under-voltage protection meets conducted emission requirements of most major power buses: 100hz - 100khz: 80db arms short circuit and overload protection meets the derating requirments of eee-inst-002 synchronization input / output on/off control via converters?s inhibit pin and individual output?s inhibit pin features 26 to 55v input, regulated dual outpu ts (+1.8v and +3.3v) non-flight versions of the d-series converters are available for system development purposes. variations in electrical specifications and screening to meet custom requirements can be accommodated. the d-series converters have two outputs, each is independently regulated. the outputs can be both positive or one positive and one negative. the d-series converters incorporate a fixed frequency flyback power stage topology and internal emi filter. the converters include an enhanced input emi filter that meets most major satellite power buses. the converters can be remotely turned on and off via an inhibit pin. additional inhibit pins are also provided to control the outputs individually. this feature facilitates turn-on outputs sequencing if desired. each converter is encased in a cold rolled steel hermetic package. the package measures 1.80"l x 1.40"w x 0.42"h and weighs less than 55 grams. the package utilizes rugged ceramic feed-through copper core pins and is hermetically sealed using parallel seam welding. two package options are available. please refer to page 8 for i/o configurations. the d-series of dc-dc converters are low power radiation hardened, high reliability devices designed for radiation environments such as those encountered by geostationary earth orbit satellites, deep space probes and communication systems. features include small size, high efficiency, low weight and a high tolerance to total ionizing dose, single event effects, and environmental stresses such as temperature extremes, mechanical shock, and vibration. all components are fully derated to meet the requirements of eee-inst-002. extensive documentation including worst case analysis, radiation susceptibility, thermal analysis, stress analysis, and reliability analysis are available. . environmental screening includes temperature cycling, constant acceleration, fine and gross leak, and burn-in as specified by mil-prf-38534 for class h hybrids. applications launch vehicles communication systems geostationary or low earth orbit satellites high cs damping 100khz - 10mhz: log-linear decrease 10mhz - 50mhz: 40db arms pd-97809
2 www.irf.com (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P circuit description design methodology an under-voltage protection circuit prohibits the converter from operating when the line voltage is too low for safe operation. the converter will not start until the line voltage rises to approximately 20v. an inhibit pin is provided to control converter operation. this inhibit pin is intended for operation with an open collector transistor drive or a relay closure to the input return. the pin may be left open for normal operation and has a nominal open circuit voltage of 4.0v. also provided are the individual output on/off control pins (pin 10, output 1 inhibit and pin 9, output 2 inhibit). the d-series is developed using a proven conservative design methodology, which includes selecting radiation tolerant and established reliability components and fully derating to the requirements of eee-inst-002. heavy derating of the radiation- hardened power mosfet virtually eliminates the possibility of segr and seb. synchronization input pin is included allowing multiple converters to operate at a common switching frequency. converters can be synchronized to a common frequency with an external clock. this may be used to eliminate beat frequency noise or to avoid generating noise at certain frequencies for noise sensitive systems. the d-series dc-dc converters utilize two-stage regulation with a flyback topology with a switching frequency of 250khz for primary regulation and linear post regulation in the secondary for each of the outputs. output power is limited under any load fault condition to approximately 110% of rated output. an overload condition causes the converter output to behave like a constant current source with the output voltage dropping below nominal. the converter will resume normal operation when the load current is reduced below the current limit point. this protects the converter from both overload and short circuit conditions. there are no latching elements to eliminate the possibility of falsely triggering the protection circuits during single event radiation exposure.
www.irf.com 3 (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P electrical performance characteristics for notes to electrical performance characteristic table, refer to page 5 specifications input voltage range -0.5vdc to +80vdc input voltage range (note 13) 26vdc to 55vdc output power internally limited output power 0 to max. rated lead temperature +300c for 10sec operating temperature -55c to +115c operating case temperature (note 12) -55c to +125c operating temperature, -55c to +80c storage temperature -55c to +135c derated (note 13) recommended operating conditions absolute maximum ratings limits parameter group a subgroup conditions -55 c t c +85 c v in = 42v dc 5%, c l = 0 unless otherwise specified min nom max unit input voltage 26 42 55 v output voltage (v out ) (out 1 / out 2) 1.8v 3.3v 1.8v 3.3v 1 1 2.3 2,3 note 1 i out = 100% rated load i out = 100% rated load 1.782 3.267 1.746 3.200 1.800 3.300 1.800 3.300 1.818 3.333 1.854 3.399 v v output power (p out ) (out 1/ out 2) 1.8v 3.3v 1,2,3 v in = 26, 42, 55v, notes 2, 11 either output 2.7 5.0 w output power (i out ) (out 1/ out 2) 1.8v 3.3v 1,2,3 v in = 26, 42, 55v, notes 2, 11 either output 0 0 1.5 1.5 a line regulation (vr line ) each output 1,2,3 v in = 26, 42, 55v i out = 0%, 50%, 100% rated -0.2 0.2 % load regulation (vr load ) each output 1,2,3 i out = 0%, 50%, 100% rated v in = 26, 42, 55v -0.5 1.5 % cross regulation (vr cross ) 1,2,3 v in = 26, 42, 55v, note 1 5.0 mv input current 1,2,3 i out = 0, pin 6 open pin 6 connected to pin 2 35 10 ma switching frequency (f s ) 1,2,3 225 250 275 khz synchronization input frequency range pulse high level pulse low level pulse transition time pulse duty cycle 1,2,3 external clock on sync in (pin 4) note 1 450 2.5 -0.5 40 20 550 5.0 0.5 80 khz v v v/ s %
4 www.irf.com (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P electrical performance characteristics (continued) for notes to electrical performance characteristic table, refer to page 5 limits parameter group a subgroup conditions -55 c t c +85 c v in = 42v dc 5%, c l = 0 unless otherwise specified min nom max unit output ripple (v rip ) each output 1.8v 3.3v 1,2,3 v in = 26, 42, 55v i out = 100% rated load note 3 50 50 mv p-p output ripple @ switch frequency 1,2,3 v in = 26, 42, 55v i out = 100% rated load, note 1 0.5 0.75 mv rms efficiency (e ff ) 1,2,3 i out = 100% rated load 45 47 % enable input (inhibit) open circuit voltage drive current (sink) voltage range 1,2,3 note 1 0 -0.5 4 600 50 v a v current limit point each output 1.8v 3.3v 1,2,3 v out = 90% of nominal note 10 105 105 145 145 % power dissipation load fault (p d ) 1,2,3 short circuit, overload, note 5 24 w output response to step load changes (v tld ) 1.8v 3.3v 4,5,6 half load to/ from full load, note 6 -15 -15 15 15 mv pk recovery time, step load changes (t tld ) 1.8v 3.3v 4,5,6 half load to/from full load, notes 6, 7 500 500 s recovery time, step line changes ( t tln ) 4,5,6 26v to/from 55v i out = 100% rated load, notes 1, 7, 8 100 s turn-on response overshoot (v os ) 1.8v 3.3v turn-on delay (t dly ) 4,5,6 10% load, full load note 9 0.2 25 25 10 mv ms capacitive load (c l ) 1.8v 3.3v 1 i out = 100% rated load no effect on dc performance, notes 1, 4 each output 220 220 f
www.irf.com 5 (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P electrical performance characteristics (continued) notes: specification and electrical performance characteristics 1. parameter is tested as part of desi g n characterization or after desi g n chan g es. thereafter, parameter shall be guaranteed to the limits specified. 2. parameter verified during line and load regulation tests. 3. guaranteed for a d.c. to 20mhz bandwidth. tested using a 20khz to 10mhz bandwidth. 4. capacitive load may be any value from 0 to the maximum limit without compromising dc performance. a capacitive load in excess of the maximum limit may interfere with the proper operation of the converter?s overload protection, causing erratic behavior during turn-on. 5. overload power dissipation is defined as the device power dissipation with the load set such that both outputs are in a short circuit mode. 6. load step transition time 10 sec. 7. recovery time is measured from the initiation of the transient to where v out has returned to within 1% of its steady state value. 8. line step transition time 100 sec. 9. turn-on delay time from either a step application of input power or a logic low to a logic high transition on the inhibit pi n (pin 6) to the point where v out = 90% of nominal. 10. current limit point expressed as a percentage of full rated load current. 11. for models with two positive outputs the envelope specification for the design is that each output voltage is limited to th e range 1v to 5v. 12. although operation at temperatures between +85c and +125c is guaranteed, no parameter limits are specified. 13. meets the derating requirements of eee-inst-002 ? except for ceramic capacitors with voltage stress below 10v will minimum be rated at 50v and a minimum load of 20ma on each output. limits parameter group a subgroup conditions -55 c t c +85 c v in = 42v dc 5%, c l = 0 unless otherwise specified min nom max unit emc conducted susceptibility (line rejection) 1 i out = 100% rated load primary power sine wave injection of 2vp-p, 100hz to 50mhz, note 1 80 90 db electromagnetic interference (emi), conducted emission (ce) 1 i out = 100% rated load, note 1 limits per figure 1 isolation 1 input to output or any pin to case except pin 3, test @ 50vdc 100 m ? device weight 55 g mtbf mil-hdbk-217f2, sf, 35 c 1 x 10 5 hours
6 www.irf.com (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P device screening international rectifier currently does not have a dscc certified radiation hardness assurance program. notes: 1. best commercial practice radiation performance characteristics * test performed at tamu test / inspection method /em suffix flight (no suffix) element evaluation mil-std-38534 class k equivalent with sem n/a x nondestructive bond pull mil-std-883, method 2023 n/a x internal visual mil-std-883, method 2017 note 1 x temperature cycling mil-std-883, method 1010 n/a condition c constant acceleration mil-std-883, method 2001, y1 axis n/a 3000 g?s pind mil-std-883, method 2020 n/a a burn-in (2 x 220 hours) mil-std-883, method 1015 48 hours 440 hours @ 115c @ 115c final electrical (group a) in accordance with device specification x x seal mil-std-883, method 1014 condition a fine leak a1 gross leak c radiographic mil-std-883, method 2012 n/a n/a external visual mil-std-883, method 2009 note 1 yes test conditions min unit mil-std-883, method 1019.5 total ionizing dose (gamma) * operating bias applied during exposure, 50 krads (si) full rated load, v in = 50v heavy ions (let) single event effects * operating bias applied during exposure, 40 mev cm 2 / m g seu, sel, segr, seb full rated load, v in = 26, 42, 55v
www.irf.com 7 (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P fig. 1 - emi conducted emission performance limit fig. 2 - a typical input emi conducted emission performance
8 www.irf.com (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P mechanical outline - option a (straight pins) all dimensions are in inch. .xx: 0.01 .xxx: 0.005 mechanical outline - option b (down pins) 1.800 1.550 1.30 1.90 1.650 1.400 ? 0.140 1.70 0.15 0.420 max. 0.050 0.400 1.000 ref. pin ? 0.040 0.220 0.41 0.200 typ. non-cum all dimensions are in inch. .xx: 0.01 .xxx: 0.005

www.irf.com 9 (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P block diagram

1 6 4 2 12 3 7 8 11
10 5
9 pin designation pin # p (both outputs positive) 1 input 2 input return 3 case 4 sync in 5 sync out 6 inhibit 7 output 2 8 output 2 return 9 output 2 inhibit 10 output 1 inhibit 11 output 1 return 12 output 1 note: pins 8 and 11 are internally connected
10 www.irf.com (26 to 55v input, regulated dual outputs) (+1.8v and +3.3v) D5001R803R3P part numbering world headquarters: 101 n, sepulveda blvd., el segundo, california 90245, usa tel: (310) 252-7105 ir san jose: 2520 junction avenue, san jose, california 95134, usa tel: (408) 434-5000 visit us at www.irf.com for sales contact information . data and specifications subject to change without notice. 05/2013 d 50 01r8 /em model d = two outputs, 5w max each, radiation- tolerant design input voltage 50 = 50v quality level em = engineering model h = class h per mil-prf-38534 output configuration p = both positive output 1 01r8 = 1.8v p 03r3 i/o pin option a = straight pins b = down pins output 2 03r3 = 3.3v a a lead finish a = solder dipped c = gold plated blank = for em, lead finish as available

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